Interleaver-Division Multiple Access on the OR Multiple Access Channel

The OR channel provides an unusual opportunity where single-user decoding permits operation at about 70% of the full multiple-access channel sum capacity. The interleaverdivision multiple access technique applied in this paper can approach that performance with turbo and LDPC solutions. The current paper focuses on very low latency codes with simple Viterbi decoding, intended for very high speed (gigabits per second) applications. Namely, it focuses on nonlinear trellis codes that provide about 30% of the full multiple-access sum capacity at high speeds and with very low latency. These trellis codes are designed specifically for the Z-channel that arises in a multipleuser OR channel when the other users are treated as noise. In order to optimize the sum-capacity of the OR-MAC, the trellis code transmits codewords with a ones density much less than 50%. Also, a union bound technique that predicts the performance of these codes is presented. Results from simulations and an award-winning FPGA implementation are shown.